How to Advance Chip Design with Digital Twins and EDA

Advantest Talks Semi

Transform your understanding of semiconductor design and testing with the latest episode of Advantest Talks Semi. We are thrilled to introduce our new co-host, Don Ong, and welcome Ron Press, and Marc Hutner, from Siemens as they share groundbreaking insights into Electronic Design Automation (EDA).
Ron Press is the Senior Director for Technology Enablement at Siemens, where he leads a team dedicated to ensuring the successful implementation and use of Siemens' Tessent DFT and test product capabilities. His responsibilities include enabling application engineers, developing reference flows, and supporting customers in utilizing Siemens' released products effectively.

Ron began his career at Raytheon, working on AI and neural networks, and in 1993, he co-authored a paper on using neural networks to address built-in self-test (BIST) false alarms, highlighting his early contributions to AI in semiconductor testing. He worked as a Design for Test (DFT) architect at Raytheon before moving to Harris RF, where he focused on communication systems. Ron later joined Mentor Graphics, which was subsequently acquired by Siemens. Throughout his career, he has integrated AI and machine learning into semiconductor testing and design, significantly advancing the field.

Marc Hutner is the Director of Product Management for Yield Learning Products at Siemens. In his role, Marc focuses on yield learning and silicon debugging, aiming to identify yield limiters and improve semiconductor testing processes.

Marc joined Siemens over a year ago, bringing more than 20 years of experience in the semiconductor test industry. Before joining Siemens, he spent two years at proteanTecs as the Senior Director of Product Marketing for IP and Analytics for silicon health. Marc’s background includes working as an architect for test equipment and developing innovative concepts in semiconductor testing. His extensive experience positions him as a key figure in advancing Siemens' yield learning and debug capabilities.

Don Ong is the Director and Head of Innovation for the Advantest Field Service Business Group, a division of Advantest Inc. In his role, Don is responsible for driving the strategic development and implementation of innovative solutions that enhance Advantest’s Field Service business and operations. His responsibilities include identifying emerging technologies, leading cross-functional innovation projects, and fostering a culture of continuous improvement to optimize service efficiency, customer satisfaction, and business growth. Don works closely with internal teams and external partners, including startups, universities, and third parties, to ensure the successful integration of new technologies that meet the evolving needs of the semiconductor industry.

With over 20 years of experience in the semiconductor industry, Don has held multiple roles, including program management, product, application, and test engineering in both Silicon Valley and Asia. He holds a Bachelor's degree in Electrical and Electronics Engineering from Nanyang Technological University in Singapore and a Master’s of Studies from the University of Cambridge in the United Kingdom.

In this episode we will discover how scan technology and automatic test pattern generation (ATPG) have revolutionized the testing process, significantly boosting defect detection rates. Mark delves into digital twins, explaining their pivotal role in creating virtual representations for real-time system optimization.

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챕터

1. How to Advance Chip Design with Digital Twins and EDA (00:00:00)

2. Overview of EDA’s History and Evolution (00:00:33)

3. Introduction to Siemens Experts: Ron Press and Marc Hutner (00:02:59)

4. What is a Digital Twin? (00:04:11)

5. Digital Twin Applications in Semiconductor Testing (00:05:52)

6. Digital Twins and Sustainability (00:07:26)

7. Why Does EDA Need a Digital Twin? (00:09:03)

8. Integrating Digital Twins into EDA Workflow (00:11:19)

9. Real-World Example: Digital Twin Resolution Improvement (00:12:25)

10. Benefits of Digital Twins: Time Savings and Faster Time-to-Market (00:13:13)

11. Leveraging Digital Twins for Diagnosis and Machine Learning (00:14:53)

12. Digital Twins in Factory Settings (00:16:30)

13. Enhancing Data Transfer with Digital Twins in EDA (00:17:15)

14. Siemens' Digital Factory and Industrial Metaverse (00:18:37)

15. Machine Learning Applications in Digital Twins (00:19:44)

16. Data Flow from EDA Digital Twins to Smart Factories (00:21:28)

17. Unsupervised Learning in Diagnosis Engines (00:23:44)

18. Balancing Computational Demand in Real-Time Simulations (00:24:42)

19. 26:47 - Future of Digital Twins and EDA Collaboration (00:26:47)

20. Siemens and Advantest’s Joint Efforts in Digital Twins and Adaptive Testing (00:29:07)